1. Field of the Invention
The present invention relates to multi-processor apparatus which includes a plurality of processors operably connected to access a plurality of main storage units (MSUs). More particularly, the present invention relates to an improved system for operably interconnecting input-output cables to properly connect a plurality of MSUs for operation by a plurality of data processors.
2. Description of the Prior Art
Heretofore, large mainframe computing systems have been manufactured and sold which included a plurality of instruction processors and a plurality of I/O processors adapted to be programmably connected to a plurality of MSUs. Such configurations of computing systems are commonly referred to as multi-processor computing systems wherein any particular instruction processor and its associated I/O processor(s) may be connected to a plurality of MSUs. The interconnections between MSUs can only be connected or configured after knowing the number of instruction processors in the multi-processor system and further knowing which of the MSUs will be accessed by the different ones of the instruction processors.
It is well known in the prior art that being able to custom configure a multi-processor system enhances the throughput and increases the efficiency of multi-processor systems. Heretofore, MSUs have been provided with a plurality of interfaces, each of which may be operably connected to another MSU in a multi-MSU configuration by programmably opening and closing latches or switches which operatively connect the input-output cables at the interface of the MSU.
It is a feature of the present invention to provide a more efficient and less costly interface and interconnection structure at the MSUs.